Mapping array to AXI4 slave

Does HDL coder handle the mapping of arrays differently than scalars? I created an output variable in stateflow that is size 32 and of type uint32. In the target interface of HDL Workflow Advisor I set the interfacing mapping to x"100" for this variable, array_out. I tried hard coding array_out(5) = uint32(0xA5A5) but when I read address 0xC0000114 (In the cyclone V, the h2f AXI bridge has base address 0xC0000000 in the processor's address space) I get 0. However, the scalar which got mapped as x"184" reads back the expected value when I read address 0xC0000184. I was reading this documentation: https://www.mathworks.com/help/hdlcoder/ug/model-design-for-axi4-slave-interface-generation.html#mw_89ad653f-e9ac-4d69-8be8-91ac10ba7f2c_sep_bu0r_op-1 and it appears that some sort of strobe signal might getting inserted somewhere for synchonization. However, I do not want this behavior if that's what is happening. I want a collection of 32, 32-bit registers that I can reference by index into an array.

[John]

After further testing, I manually wrote a 1 into the strobe register (devmem 0xC0000180 32 0x1) and then I was able to read back the expected values from the elements of the array so that does appear to be the issue. How can I change this behavior since I do not require synchronization among the different elements in the array? I want a collection of 32, 32-bit registers that I can index from an array. I would prefer not to have to create 32 different scalars each with its out port.

Answer 1

[Wang Chen]

Hi John,

As the document explains: When you map vector ports, HDL Coder uses additional strobe registers for each port to maintain the synchronization with the IP core algorithm logic. For input ports, the strobe registers control the enable signals for a set of shadow registers, making the IP core algorithm logic see the updated vector elements simultaneously. For output ports, the strobe registers make sure that the vector data to be read is captured synchronously.

If you do not want to have the synchronization logic, you can:

1. Option1, use 32 scalar ports
2. Option2, consider using the bus data type. HDL Coder treats bus ports as a group of independent scalars, no additional strobe register is generated.

https://www.mathworks.com/help/hdlcoder/ug/model-design-for-axi4-slave-interface-generation.html#mw_8c2a284d-b15a-4f11-8802-6e2af4f5bc3b

https://www.mathworks.com/help/hdlcoder/ug/bus-data-types-example.html

Thanks,

Wang