The Resize block in the Video and Image Processing Blockset does not generate HDL code. But you can use Simulink HDL Coder to implement the algorithm yourself.
If you want to resize a static image, i.e., your input image is stored in the memory and your output image will be saved to memory too, the design is simpler. You just need a few steps.
- Compute the locations of output pixels. If we assume your scaling factor is s, then the (i, j)th pixel will locate at (i*s, j*s).
- Compute the interpolation weights. There are several methods you can pick, for example, nearest neighbor, bilinear, bicubic, etc. As an example, the weights for bilinear method will be (ceil(i*s) – i*s)) and (i*s – floor(i*s)) in the first dimension.
- Convolute the interpolation weights with the image for the output pixel values.
Note that the output pixel locations and interpolation weights are repeated in horizontal and vertical directions. So you can reduce computation by computing the whole image in one direction, and then the other direction. As Seth pointed out, you can use look up table to speed up computation. You can also generate code from the Resize block to see the implementation details.
If you want to resize an image stream, i.e., you receive a pixel of the input image at a certain clock rate and you want to output a pixel of the resized image at a different clock rate, the design will be much more challenging. Because you mentioned FPGA, I guess this is the design you want to achieve. For this design, you can use the same weights computed for the static image, but you need to be careful on clock rate, buffer, and pixel location. You can try the following steps.
- At the input clock rate, save a few lines of pixels of the input image. The number of buffer lines is the same as your filter length.
- At an intermediate clock rate, interpolate the pixels in horizontal direction. The intermediate clock rate can be computed from your input clock rate and the scaling factor, for example, s*clk_in. The results are saved to another line buffer.
- At the output clock rate, interpolate the pixels in vertical direction.
What I didn’t mention above is that you need to count the pixels in order to know where the current pixel is, and you need to implement a buffer read/write controller.