is it possible to run the demo "Performing Large Matrix Operation on FPGA using External Memory" on Intel Altera FPGA?

I am using HDL coder 2018a pre-release version to run the demo "Performing Large Matrix Operation on FPGA using External Memory" on Altera FPGA, but had some problems. Since Altera external memory support Altera PHY Interface(AFI) or Avalon MM(memory mapped) interface, while the demo intrinsically uses AXI-4 bus. So is it possible to run this demo on Alter FPGA?

Answer 1

[Eric Cigan]

Yes, it should be possible. If you are still interested, please write to me at eric.cigan at mathworks.com.

[Lin Bai]

Thank you Eric, I have figured it out