I'm trying to verify my VHDL code with HDL Verifier. I used the cosimWizard to generate the ModelSim Simulator block. When I try to start the Simulink simulation the following error appears:
The "VariableStepDiscrete" solver cannot be used to simulate block diagram 'control' because it contains continuous states
I tried to change the solver to FixedStepDiscrete but no way, same error.
Since the VHDL block I'm implementing is inherently discrete, why the solver give me such an error?
Thanks in advance.