HDL Code Generation Erros

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I am trying to make a Pattern Detector who will detect the pattern 1101001 by using Moore FSM. My FSM is working fine but when i am trying to generate a HDL code,I am getting many errors and unable to rectify them. Please help me to generate Verilog/VHDL Code. I am unable to do it. I will be very thankful to you,please help me ?

Accepted Answer

Kiran Kintali
Kiran Kintali on 6 Oct 2020
>> makehdl(gcb)
### Generating HDL for 'Pattern_Detector_19a/Subsystem'.
### Using the config set for model Pattern_Detector_19a for HDL code generation parameters.
### Starting HDL check.
### Begin VHDL Code Generation for 'Pattern_Detector_19a'.
### Working on Pattern_Detector_19a/Subsystem/Chart as hdlsrc\Pattern_Detector_19a\Chart.vhd.
### Working on Pattern_Detector_19a/Subsystem as hdlsrc\Pattern_Detector_19a\Subsystem.vhd.
### Generating package file hdlsrc\Pattern_Detector_19a\Subsystem_pkg.vhd.
### Creating HDL Code Generation Check Report Subsystem_report.html
### HDL check for 'Pattern_Detector_19a' complete with 0 errors, 0 warnings, and 0 messages.
### HDL code generation complete.
>> ver
-----------------------------------------------------------------------------------------------------
MATLAB Version: 9.6.0.1472908 (R2019a) Update 9
MATLAB License Number: unknown
Operating System: Microsoft Windows 10 Enterprise Version 10.0 (Build 19041)
Java Version: Java 1.8.0_181-b13 with Oracle Corporation Java HotSpot(TM) 64-Bit Server VM mixed mode
-----------------------------------------------------------------------------------------------------
Can you try the attached model again? As you can see I do not see such error.
  4 Comments
kameshwar saini
kameshwar saini on 7 Oct 2020
I got the mistake , I was generating the HDL code for whole system,while i have to do it for subsystem only.
Now i did it for subsystem, and i able to generate it successfully . Thank you so much sir, I have no words to say thanks to you. Thank you again.

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More Answers (1)

Kiran Kintali
Kiran Kintali on 6 Oct 2020
HDLCoder does not support Stateflow chart configured with floating-point types.
Based on your application you do not need support for floating-point types for this pattern detection example. Changing input types to boolean and changing output assignment to logical true/false for OV variable you can trivially transform the moore chart model to use efficient logic types and generate a hardware friendly state machine.
With these changes I was able to generate code for the model.
>> makehdl(gcb)
### Generating HDL for 'Pattern_Detector/Subsystem'.
### Using the config set for model Pattern_Detector for HDL code generation parameters.
### Running HDL checks on the model 'Pattern_Detector'.
### Begin compilation of the model 'Pattern_Detector'...
### Applying HDL optimizations on the model 'Pattern_Detector'...
### Begin model generation.
### Model generation complete.
### Begin VHDL Code Generation for 'Pattern_Detector'.
### Working on Pattern_Detector/Subsystem/Chart as hdlsrc\Pattern_Detector\Chart.vhd.
### Working on Pattern_Detector/Subsystem as hdlsrc\Pattern_Detector\Subsystem.vhd.
### Generating package file hdlsrc\Pattern_Detector\Subsystem_pkg.vhd.
### Code Generation for 'Pattern_Detector' completed.
### Creating HDL Code Generation Check Report Subsystem_report.html
### HDL check for 'Pattern_Detector' complete with 0 errors, 0 warnings, and 0 messages.
### HDL code generation complete.
If you have trouble loading the model try
web(fullfile(docroot, 'simulink/gui/simulink-preferences-model-file-pane.html'))
slprivate('showprefs') and uncheck "Do not load models created with a newer version of Simulink"
or run this command
>>set_param(0, 'ErrorIfLoadShadowedModel', 'off')
  5 Comments
kameshwar saini
kameshwar saini on 6 Oct 2020
Sir Model is loaded ,but when i am generating HDL code, it is showing following error for me . Why?

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