Change RF parameters from matlab using libiio on adrv9361z7035

I am using adrv9361z7035 board. I wanted to control the RF parameters OF AD9361 from matlab using libiio. As the first step I have installed and setup Communications Toolbox Support Package for Xilinx Zynq-Based Radio. With the Linux image copied to the SD card, i was able to run the example.

1) I wanted to change the RF parameters like sampling frequency, LO frequency, gain, gain mode, etc from matlab with the help of libiio. Is there any APIs for that.

2) Will i be able to do the same if i load a cutom binary file?

By using the system command i am able to change few RF parametrs from matlab wilth iio commands(image:system(iio_cmd)).

I tried to follow this link to capture samples and save it

https://wiki.analog.com/resources/tools-software/linux-software/libiio/iio_readdev

3) I was able to do so with the image provided while setting up communication toolbox. But when i try to capture using a custom binary,even with qpsk example model, I am getting buffer error "Unable to refill buffer: Unknown error".

Any inputs will be helpfull. Thankyou.

Answer 1

[Martin Enderwitz]

The Communications Toolbox Support Package for Xilinx Zynq-Based Radio is based on the reference design provided by Analog Devices, with some modifications. Support for RF parameter configuration and data streaming is provided through MATLAB APIs that use libiio. As such, it is recommended you use the MATLAB APIs for all interaction with hardware using this SD card image to ensure successful operation, as it is these APIs we design and test against.

1) Please see the following documentation for information on how to use the provided system objects to configure RF paramters and transmit/receive data with the A9361:

Receive data from AD936x-based Zynq radio hardware - MATLAB (mathworks.com)

Send data to AD936x-based Zynq radio hardware - MATLAB (mathworks.com)

2) If the custom bitstream is generated using the supported Hardware-Software Co-Design workflow, then you will be able to use the same system objects with any custom bitstreams you generate, as this ensures it is compatible with the reference design on the FPGA:

Hardware-Software Co-Design Workflow - MATLAB & Simulink (mathworks.com)

3) Try using the documented capture method to receive data from the AD9361 a custom bitstream:

Capture contiguous RF data using Xilinx Zynq-based radio hardware - MATLAB capture (mathworks.com)

If you're still facing issues with any of the above, then please do let me know.

Regards,

Martin

[aeon jose]

Is it possible to read or print the current values of all paramters present in the RF?

Is there are changes required in the device tree file while using a custom binary if Hardwar-software co-design is used?

[Martin Enderwitz]

Using the MATLAB System Objects, it is only possible to read the RF parameters that correspond to properties on the object, and these can be obtained by calling:

rx = sdrrx('AD936x');

info(rx)

If you follow the Hardware-Software Co-Design workflow, you do not need to change the device tree.

Regards,

Martin

[aeon jose]

Hi Martin,

I have followed the Hardware-Software Co-Design workflow and buid HW/SW Co-Design QPSK Transmit and Receive Using Analog Devices AD9361/AD9364 and HW/SW Co-Design with AXI4-Stream Using Analog Devices AD9361/AD9364. After finishing all the steps, I tried to receive data using Receive data from AD936x-based Zynq radio hardware - MATLAB (mathworks.com).

while runnig the script MATLAB is getting stuck at "## Establishing connection to hardware. This process can take several seconds." . Am i missing anything?

Thankyou

[Martin Enderwitz]

The QPSK receiver implemented within the generated IP Core will only send data back to the host when it receives and decodes valid QPSK data.

The comm.SDRRxAD936x system object is configured by default with the following:

% Set this to true to view advanced properties

rx.ShowAdvancedProperties = true;

rx.DataTimeout = inf % The receiver will wait indefinitely for valid data to be returned

rx.BypassUserLogic = false % Will not bypass the QPSK receiver algorithm in the FPGA

You can find more information about DataTimeout and BypassUserLogic in the links.

Since no valid QPSK data is being transmitted, the receiver will wait indefinitely unless you set a DataTimeout value or bypass the user logic.

In order to transmit QPSK data, you can follow the example:

QPSK Transmit Repeat Using Analog Devices AD9361/AD9364 - MATLAB & Simulink Example (mathworks.com)

If you run this example before attempting to capture data with the receiver, it will transmit QPSK data via the AD9361 and then receive it back on the same device. Note that for best results, you may require connected antennas or a loopback cable between the Tx/Rx antenna ports.

Regards,

Martin

[aeon jose]

Thank you martin, for the valid information. It helped a lot.

I would like to know more about the path data is transmitted when transmitrepeat is called and what path it takes when BypassUserLogic is True.

1. Does it use DMA or axi interconnect to transfer data from Zynq to PL.
2. What path does it take when BypassUserLogic is True.
3. What is the role of bypass_rx and bypass_tx in the design.
4. How does the data from Matlab reach the RF.

regards,

Aeon

[Martin Enderwitz]

Hi Aeon,

The documentation on Hardware-Software Co-Design I linked earlier gives a high-level overview of the architecture on the Zynq side that illustrates some of my answers below:

Hardware-Software Co-Design Overview - MATLAB & Simulink (mathworks.com)

1. By default, DMA is used to transfer data from PS to PL. If you want to use AXI4 interconnect, you can follow the example here: HW/SW Co-Design with AXI4-Stream Using Analog Devices AD9361/AD9364 - MATLAB & Simulink (mathworks.com)
2. BypassUserLogic effectively controls a multiplexer, that when set to true will route the data directly to/from the RF HDL IP to the DMA, bypassing the "User Logic" in the diagram.
3. I'm not sure what you mean by bypass_rx, bypass_tx here - could you clarify?
4. There are 2 different mechanisms here, depending on whether you use the "transmit" or "transmitRepeat" functions of the system object. transmit will stream data from MATLAB to the Zynq PS over the Ethernet connection, via libiio. This then goes through the Tx data path on the FPGA to the RF. transmitRepeat is slightly different, in that it will load a given waveform into DDR memory on the FPGA and then cyclically repeat that waveform until stopped. As such, there is no "live" streaming between MATLAB and the Zynq device at this point.

Hope that answers your questions!

Regards,

Martin

[aeon jose]

3. I'm not sure what you mean by bypass_rx, bypass_tx here - could you clarify?

While opening the vivado project created by the workflow we can see two blockes named bypass_rx and bypass_tx along with some other blocks.

I would like to know the operation of bypassing user logic from the hardware side.