SystemVerilog DPI component generation from a MATLAB FFT

Version 1.1.2 (87.8 KB) by MathWorks HDLVerifier Team
Small example demonstrating the workflow for generating a SystemVerilog DPI component from MATLAB
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Updated 13 Oct 2021

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This small example generates SystemVerilog DPI components from MATLAB, for use in a Universal Verification Methodology (UVM) testbench. The components are a reference model that is used in the UVM scoreboard, and a waveform generator that is used as a UVM sequence. It contains run scripts for Mentor Questa, Synopsys VCS, and Cadence Incisive.
This model was referred to by the article posted here:
https://verificationacademy.com/verification-horizons/june-2015-volume-11-issue-2/Reuse-MATLAB-Functions-and-Simulink-Models-in-UVM-Environments-with-Automatic-SystemVerilog-DPI-Component-Generation
For more information on integrating MATLAB and Simulink models into UVM environments:
http://www.mathworks.com/discovery/uvm-verification.html

Cite As

MathWorks HDLVerifier Team (2026). SystemVerilog DPI component generation from a MATLAB FFT (https://www.mathworks.com/matlabcentral/fileexchange/56159-systemverilog-dpi-component-generation-from-a-matlab-fft), MATLAB Central File Exchange. Retrieved .

MATLAB Release Compatibility
Created with R2021b
Compatible with R2015a and later releases
Platform Compatibility
Windows macOS Linux
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Version Published Release Notes
1.1.2

Re-instated support for Synopsys VCS. See README.txt for instructions.
1.1.1.1

Fixed issue with previous upload where the hdlsrc folder was missing
1.1.1.0

Updated Questa simulation options and added a note on how to debug when DPI generation fails due to a name collision with the rms function.
1.1.0.0

Added support for Synopsys VCS
1.0.0.1

Updated license
Added links for more information
1.0.0.0