The current trends in the automotive industry, like ADAS, xEV, and EE architectures, lead to a demand of high computational power. Fulfilling this demand within the environmental constraints of an automotive system is a challenge. The next AURIX™ generation TC4x addresses this with an heterogenous multicore architecture. A multicore compute cluster with scalar cores is combined with an accelerator capable of processing multiple data with a single instruction.
This presentation will demonstrate how such an architecture can be programmed using Model-Based Design. We will focus on the challenge of moving algorithms from a classic scalar architecture to a parallel architecture. In addition, we also will demonstrate a workflow for finding an optimal partition between the different compute clusters on the AURIX™ SoC. The challenge for the parallel architectures is that there are many different programming models in the market, which are not really compatible with the paradigms of the safety critical software development. We will demonstrate how this can be solved using Embedded Coder® and its customization capabilities. The basis of the partitioning concept is the capability to easily move software from one compute cluster to another. Therefore, different partitions of the application can be profiled using the PIL methodology. The results can then be used to determine an optimal partition and model it within Simulink®. With the help of SoC Blockset™, it is also possible to simulate different scenarios and further fine-tune the application.
Overall, this presentation demonstrates how the full computational power offered by the next generation AURIX™ can be easily utilized.
