Terminate unconnected output port
Simulink / Commonly Used Blocks
Simulink / Sinks
HDL Coder / Sinks
Use the Terminator block to cap blocks whose output ports do not connect to other blocks. If you run a simulation with blocks having unconnected output ports, Simulink® issues warning messages. Using Terminator blocks to cap those blocks helps prevent warning messages.
Port_1 — Input signal
scalar | vector | matrix | n-D array | bus
Use this port to direct signals from output ports that are otherwise unconnected during a simulation. The port accepts real or complex signals of all data types.
fixed point |
C/C++ Code Generation
Generate C and C++ code using Simulink® Coder™.
HDL Code Generation
Generate Verilog and VHDL code for FPGA and ASIC designs using HDL Coder™.
You can use this block to terminate simulation when you use the block with subsystems that generate HDL code. The block cannot be included in the hardware implementation.
HDL Block Properties
Control the removal of unconnected logic. The default is
PLC Code Generation
Generate Structured Text code using Simulink® PLC Coder™.
Design and simulate fixed-point systems using Fixed-Point Designer™.
Introduced before R2006a