Simscape Hardware-in-the-Loop Workflow
You can generate HDL code for your plant model that you developed by using Simscape™ blocks and then deploy the generated code to standalone FPGA boards, or to FPGAs onboard the Speedgoat® I/O modules, SoC devices, and so on. By deploying the plant model to an FPGA board, you can accelerate the simulation of your plant model and simulate the model in real time by using Hardware-in-the-Loop (HIL) simulations.
Before you generate HDL code, use the
sschdladvisor function to
generate an HDL implementation model from Simscape switched linear models. Switched linear models are models that contain blocks
such as diodes or switches. These blocks are defined by a linear relationship such as
V = IR where
R can switch between two or more values
depending on the state of the diodes or switches.
After you generate the HDL implementation model, you can use HDL Coder™ to generate code for this model and deploy the generated code to target platforms by using the HDL Workflow Advisor. When you generate the HDL implementation model, you can specify whether to generate the implementation model with single-precision or double-precision floating-point data types. You can also specify insertion of a validation logic in the implementation model to verify whether the HDL implementation numerically matches the original Simscape algorithm.
|Open Simscape HDL Workflow Advisor|
|Generate HDL RTL code from model, subsystem, or model reference|
- Get Started with Simscape Hardware-in-the-Loop Workflow
Simscape Hardware-in-the-Loop workflow modeling guidelines and restrictions.
- Modeling Guidelines for Simscape Subsystem Replacement
Simscape modeling best practices for replacing Simscape subsystem with state-space algorithm.
- Partition Simscape Models Containing a Large Network into Multiple Smaller Networks
Learn how to partition a large Simscape network into multiple networks.
- Generate HDL Code from Simscape Models in the Simscape FPGA HIL Workflow (Simscape)
Learn how to convert Simscape models to HDL Code for FPGA Deployment.
- Simscape Language Support
Simscape language support in Simscape Hardware-in-the-Loop Workflow.
Implementation Model and Code Generation
- Generate HDL Code for Simscape Models
Generate HDL code from Simscape switched linear models.
- Generate HDL Code for Simscape Models with Multiple Networks
How to split a large Simscape network into multiple networks and generate HDL implementation model.
- Generate Optimized HDL Implementation Model from Simscape
Optimize area and timing of HDL implementation model generated from Simscape by using HDL Coder optimizations.
- Validate HDL Implementation Model to Simscape Algorithm
Validate and resolve simulation mismatch between Simscape algorithm and HDL implementation model.
- Improve Sampling Rate of HDL Implementation Model Generated from Simscape Algorithm
Learn about oversampling in generated HDL implementation model and how the model sample time relates to sample time of original Simscape algorithm.
Simscape HDL Workflow Advisor
- Simscape HDL Workflow Advisor Tasks
Learn about the Simscape HDL Workflow Advisor and the various tasks to convert the Simscape algorithm to HDL implementation model.
- Simscape HDL Workflow Advisor Tips and Guidelines
Learn about tips in Simscape HDL Workflow Advisor UI and how to use them as workflow guidelines.
- Troubleshooting Real-Time Hardware Deployment Issues in Simscape Hardware-in-the-Loop Workflow
Troubleshoot real-time hardware deployment issues in Simscape Hardware-in-the-Loop workflow.