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HDL Block Properties: Native Floating Point

Overview

Block implementation parameters enable you to control details of the code generated for specific block implementations. See Set and View HDL Model and Block Parameters to learn how to select block implementations and parameters in the GUI or the command line.

Property names are specified as character vectors. The data type of a property value is specific to the property. This section describes the syntax of each block implementation parameter that you can specify in the Native Floating Point tab of the HDL Block Properties. You can see how specifying the parameter affects the generated code.

HDL Block Properties of Library Blocks

HDL block properties of library blocks are treated similar to mask parameters. When you instantiate library blocks in your model, the current HDL block properties of that library block are copied to instances of that block in your model. The HDL block properties of these instances are not synchronized with the HDL block properties of the library block. That is, if you change the HDL block property of the library block, the change does not get propagated to instances of the library block that you already added to your Simulink® model. If you want the HDL block properties of a library block to be synchronized with its instances in the model, create a Subsystem and then place this block inside that Subsystem. The HDL block properties of blocks that reside inside the library block are synchronized with the corresponding instances in your model.

Suppose a library contains a Subsystem block with HDL architecture set to Module. When you instantiate this block in your model, the block instance uses Module as the HDL architecture. If you change the HDL architecture of the Subsystem block in the library to BlackBox, existing instances of that Subsystem block in your model still use Module as the HDL architecture. If you now add instances of the Subsystem block from the library in your model, the new block instances get a copy of the current HDL block properties, and therefore use BlackBox as the HDL architecture. If you want the HDL architecture of the Subsystem block in the library to be synchronized with its instances in the model, create a wrapper subsystem with the HDL architecture that you want inside this Subsystem.

CheckResetToZero

You can use the CheckResetToZero property for the mod and rem functions of the Math Function block in native floating-point mode. If you have numbers a and b such that the quotient a/b is close to an integer, this setting treats a as an integral multiple of b, and rem(a,b)=0. This result is numerically accurate and matches the Simulink simulation result. However, computing this result uses additional resources and increases the area footprint on the target FPGA device.

For example, for these sets of numbers, you get different simulation results when you enable and disable the CheckResetToZero setting.

CheckResetToZero SettingDescription
'on' (default)

When you compute mod or rem of two numbers whose quotient is closer to an integer, and has a precision greater than that of the floating point data type you use, HDL Coder™ adds the required logic to output the result of mod or rem as zero when the quotient of the numbers is close to an integer.

'off'

HDL Coder does not insert the additional logic to calculate the quotient, which saves area on the target FPGA device.

Set CheckResetToZero For the Math Function Block

To set CheckResetToZero for a block from the HDL Block Properties dialog box:

  1. Right-click the block.

  2. Select HDL Code HDL Block Properties .

  3. For CheckResetToZero, select on or off.

To set CheckResetToZero for the Math Function block inside a subsystem, my_dut in your Simulink model my_design:

hdlset_param('my_design/my_dut/Math', 'CheckResetToZero, 'on')
See also hdlset_param.

DivisionAlgorithm

You can use the DivisionAlgorithm property when you enable Native Floating Point mode for the Divide block and the Math Function block in Reciprocal mode.

DivisionAlgorithm SettingDescription
Radix-2 (default)

The default Radix-2 mode performs repeated subtractions by computing one bit of the quotient in each iteration.

To design for lower area usage while trading off for latency, use the Radix-2 mode in combination with the LatencyStrategy set to MAX.

Radix-4

The Radix-4 mode performs repeated subtractions by computing two bits of the quotient in each iteration. To compute the result, the Radix-4 mode uses half the number of iterations that is required by the Radix-2 mode.

To design for lower latency while trading off for area, use the Radix-4 mode in combination with the LatencyStrategy set to MAX.

Single-Precision Division Resource Utilization and Maximum Clock Frequency on Xilinx Virtex-7

DivisionAlgorithm ModeLatencyStrategyLatencyFmaxLUTsRegisters
Radix-2MIN17334.4MHz12481011
MAX32454.5MHz12941797
Radix-4MIN11245.5MHz1956865
MAX20453.1MHz18541522

Specify DivisionAlgorithm For the Math Function or Division Block

To specify DivisionAlgorithm for a block from the HDL Block Properties dialog box:

  1. Right-click the block.

  2. Select HDL Code > HDL Block Properties.

  3. In the Native Floating Point tab, specify the DivisionAlgorithm.

To specify DivisionAlgorithm for the block at the command line, use hdlset_param. For example, this command specifies Radix-4 mode for a Divide block inside a subsystem, my_dut in your Simulink model my_design:

hdlset_param('my_design/my_dut/Divide, 'DivisionAlgorithm', 'Radix-4')

HandleDenormals

You can use the HandleDenormals property for certain blocks that support HDL code generation in Native Floating Point mode. Denormal numbers are numbers that have magnitudes less than the smallest floating-point number that can be represented without leading zeros in the mantissa. With this setting, you can specify whether you want HDL Coder to insert additional logic to handle the denormal numbers in your design. For more information, see Denormal Numbers.

HandleDenormals SettingDescription
'inherit' (default)

Use the handle denormals setting of the parent subsystem. If this subsystem is the highest-level subsystem, use the handle denormals setting for the model.

'on'

If you have denormal numbers at these block inputs, HDL Coder adds the logic to normalize the denormal numbers.

'off'

HDL Coder does not insert additional logic to handle denormal numbers in your design. The code generator treats the denormal value as zero before performing any computation.

To enable HandleDenormals for a block within a model, set the parameter, HandleDenormals, to 'on' for that block.

Set Handle Denormals For a Block

To set handle denormals for a block from the HDL Block Properties dialog box:

  1. Right-click the block.

  2. Select HDL Code > HDL Block Properties .

  3. For HandleDenormals, select inherit, on, or off.

To set handle denormals for a block from the command line, use hdlset_param. For example, to enable adaptive pipelining for a Product block inside a subsystem, my_dut in your Simulink model my_design:

hdlset_param('my_design/my_dut/Product', 'HandleDenormals', 'on')
See also hdlset_param.

InputRangeReduction

You can use the InputRangeReduction property for the sin, cos, tan, sincos, and cos+jsin functions of the Trigonometric Function block in Native Floating Point mode. By default, this setting is enabled for the block, and it assumes that your input range is unbounded. If your input to the block is bounded in the range [-pi, pi], your design does not require the logic to reduce the input range. In that case, you can disable this setting, and the block implementation incurs a lower latency and uses fewer resources on the target hardware. When you disable the setting, the generated model contains a block that verifies whether the inputs are bounded in the range [-pi, pi].If you have unbounded inputs, the generated model triggers an assertion during simulation.

InputRangeReduction SettingDescription
'on' (default)

Assumes that the input range is unbounded and inserts additional logic to reduce the input argument range to [-pi, pi] before computing the algorithm.

'off'

Assumes that the input argument is bounded in the range [-pi, pi] and does not insert the additional logic to reduce the input argument range. This implementation reduces the latency and saves area on the target platform.

Set InputRangeReduction For the Trigonometric Function Block

To set InputRangeReduction for a block from the HDL Block Properties dialog box:

  1. Right-click the block.

  2. Select HDL Code HDL Block Properties .

  3. In the Native Floating Point tab, for InputRangeReduction, select on or off.

To disable InputRangeReduction for the Trigonometric Function block inside a subsystem, my_trigonometric in your Simulink model my_design:

hdlset_param('my_design/my_dut/my_trigonometric', ...
                          'InputRangeReduction, 'off')
See also hdlset_param.

LatencyStrategy

You can use the LatencyStrategy property for certain blocks that support HDL code generation for fixed-point and floating-point types. When you use floating-point types, set Floating Point IP Library to Native Floating Point. For fixed-point types, the property specifies whether you want to use zero, maximum, or custom latency. For floating-point types, the property specifies whether you want the blocks in your design to map to minimum, maximum, or a custom latency for the operator.

LatencyStrategy SettingDescription
'inherit' (default)

Use the latency strategy setting of the parent subsystem. If this subsystem is the highest-level subsystem, use the latency strategy setting for the model.

'Max'

During code generation, HDL Coder uses the maximum latency value for the native floating point operator.

'Min'

During code generation, HDL Coder uses the minimum latency value for the native floating point operator.

'Zero'

During code generation, HDL Coder does not add any latency for the native floating point operator.

'Custom'

During code generation, HDL Coder adds latency equal to the value that you specify for CustomLatency or NFPCustomLatency settings of the native floating point operator. You can use this setting for certain blocks in the native floating-point mode. To see the blocks for which you can specify the setting, see NFPCustomLatency.

To specify the minimum latency option for a block within a model, set the parameter, LatencyStrategy, to 'MIN' for that block.

To learn how to set model-level latency strategy setting, see Latency Considerations with Native Floating Point.

Set Latency Strategy for Fixed-Point Blocks Block

When you use fixed-point types, you can specify the LatencyStrategy for these blocks.

  • Divide and Reciprocal blocks that have ShiftAdd as the HDL architecture.

  • Sqrt block that has SqrtFunction as the HDL architecture.

  • Trigonometric Function block that has Function set to sin, cos, sincos, cos+jsin, or atan2 and Approximation method as CORDIC.

To set latency strategy for a subsystem from the HDL Block Properties dialog box:

  1. In the Simulink toolstrip, on the Apps tab, select HDL Coder.

  2. Select the block, and on the HDL Code tab, click the HDL Block Properties button.

  3. In the General tab, specify the LatencyStrategy. If you set LatencyStrategy to Custom, you must specify a value for the CustomLatency.

To specify the latency strategy for a block from the command line, use hdlset_param. For example, to specify the minimum latency for a Product block inside a subsystem my_dut in your Simulink model my_design:

hdlset_param('my_design/my_dut/Product', 'LatencyStategy', 'MAX')
See also hdlset_param.

Set Latency Strategy for Floating-Point Block

To set latency strategy for a subsystem from the HDL Block Properties dialog box:

  1. In the Simulink toolstrip, on the Apps tab, select HDL Coder.

  2. Select the block, and on the HDL Code tab, click the HDL Block Properties button.

  3. In the Native Floating Point tab, specify the LatencyStrategy. If you set LatencyStrategy to Custom, you must specify a value for the NFPCustomLatency.

For details, see the "HDL Code Generation" section of each block page. To learn about blocks for which you can specify a custom latency, see NFPCustomLatency.

To specify the latency strategy for a block from the command line, use hdlset_param. For example, to specify the minimum latency for a Product block inside a subsystem my_dut in your Simulink model my_design:

hdlset_param('my_design/my_dut/Product', 'LatencyStategy', 'MIN')
See also hdlset_param.

CustomLatency

You can specify a custom latency for certain blocks for fixed-point types. By using the custom latency strategy, you can trade-off between clock frequency and power consumption. To specify a custom latency strategy, set LatencyStrategy to CUSTOM and specify a value for CustomLatency. For details, see the "HDL Code Generation" section of each block page.

You can specify the CustomLatency setting for these blocks with fixed-point types.

  • Divide and Reciprocal blocks that have ShiftAdd as the HDL architecture.

  • Sqrt block that has SqrtFunction as the HDL architecture.

  • Trigonometric Function block that has Function set to sin, cos, sincos, cos+jsin, or atan2 and Approximation method as CORDIC.

Set Custom Latency Value For a Block

To set custom latency value for a subsystem from the HDL Block Properties dialog box:

  1. In the Simulink toolstrip, on the Apps tab, select HDL Coder.

  2. Select the block, and on the HDL Code tab, click the HDL Block Properties button.

  3. In the General tab, set LatencyStrategy to Custom and specify a value for CustomLatency.

To specify the latency strategy for a block from the command line, use hdlset_param. For example, to specify a custom latency of four for a Product block inside a subsystem my_dut in your Simulink model my_design:

hdlset_param('my_design/my_dut/Product', 'LatencyStategy', 'Custom')
hdlset_param('my_design/my_dut/Product', 'CustomLatency', 4)
See also hdlset_param.

NFPCustomLatency

You can specify a custom latency for certain blocks in the native floating-point mode. By using the custom latency strategy, you can trade-off between clock frequency and power consumption. To specify a custom latency strategy, set LatencyStrategy to Custom and specify a value for NFPCustomLatency. For details, see the "HDL Code Generation" section of each block page.

You can specify the NFPCustomLatency setting for these blocks with both single and double data types.

You can also specify a NFPCustomLatency setting for these blocks with single data types.

Set Custom Latency Value For a Block

To set custom latency value for a subsystem from the HDL Block Properties dialog box:

  1. Right-click the block.

  2. Select HDL Code > HDL Block Properties.

  3. In the Native Floating Point tab, for LatencyStrategy, select Custom.

  4. Specify a value for the NFPCustomLatency.

To specify the latency strategy for a block from the command line, use hdlset_param. For example, to specify a custom latency of four for a Product block inside a subsystem my_dut in your Simulink model my_design:

hdlset_param('my_design/my_dut/Product', 'LatencyStategy', 'Custom')
hdlset_param('my_design/my_dut/Product', 'NFPCustomLatency', 4)
See also hdlset_param.

MantissaMultiplyStrategy

You can use the MantissaMultiplyStrategy property for multipliers that support HDL code generation in native floating-point mode. Blocks that have this setting include Product, Divide, Math Function (in Reciprocal mode), and so on. By using this setting, you can specify how you want HDL Coder to implement the mantissa multiplication operation for the blocks.

MantissaMultiplyStrategy SettingDescription
'inherit' (default)

Use the mantissa multiply strategy setting of the parent subsystem. If this subsystem is the highest-level subsystem, use the mantissa multiply strategy setting for the model.

'FullMultiplier'

HDL Coder uses multipliers to perform the mantissa multiplication operation for the native floating point operator. The multipliers can utilize DSP units on the target device.

'PartMultiplierPartAddShift'

HDL Coder splits the implementation into two parts. One part is implemented with multipliers. The other part is implemented with a combination of adders and shifters. The multipliers can utilize the DSP units on the target device. The combination of adders and shifters does not utilize the DSP.

'NoMultiplierFullAddShift'

HDL Coder uses adders and shifters to implement the mantissa multiplication. This option does not utilize DSP units on the target device. You can also use this option if your target device does not contain DSP units.

To implement the mantissa multiplication with adders and shifters, set MantissaMultiplyStrategy, to 'NoMultiplierFullAddShift' for that block.

Set Mantissa Multiply Strategy For a Block

To set adaptive pipelining for a subsystem from the HDL Block Properties dialog box:

  1. Right-click the block.

  2. Select HDL Code > HDL Block Properties.

  3. In the Native Floating Point tab, for MantissaMultiplyStrategy, select inherit, FullMultiplier, PartMultiplierPartAddShift, or NoMultiplierFullAddShift.

To specify the mantissa multiply strategy for a block from the command line, use hdlset_param. For example, to implement the mantissa multiplication using adders and shifters for a Product block inside a subsystem my_dut in your Simulink model my_design:

hdlset_param('my_design/my_dut/Product', ... 
                'MantissaMultiplyStrategy', 'PartMultiplierPartAddShift')
See also hdlset_param.

MaxIterations

You can use the MaxIterations property for the mod and rem functions of the Math Function block in Native Floating Point mode. If you have numbers a and b that are significantly large integers, you can increase the MaxIterations setting to match the Simulink simulation result. However, computing this result uses additional resources and increases the area footprint on the target FPGA device.

MaxIterations SettingDescription
32 (default)

The default number of iterations to compute the result of mod and rem functions in Native Floating Point mode. This implementation can potentially result in a numerical mismatch with the Simulink simulation results for large integers.

64

Specify 64 as the number of iterations to compute the result of mod and rem functions in Native Floating Point mode. In this mode, the implementation has higher probability of matching the Simulink simulation result for significantly large integers but can use more hardware resources.

128

Specify 128 as the number of iterations to compute the result of mod and rem functions in Native Floating Point mode. In this mode, the implementation matches the Simulink simulation result for large integers but uses more hardware resources.

Set MaxIterations For the Math Function Block

To set MaxIterations for a block from the HDL Block Properties dialog box:

  1. Right-click the block.

  2. Select HDL Code > HDL Block Properties .

  3. In the Native Floating Point tab, for MaxIterations, select 32, 64, or 128.

To set handle denormals for a block from the command line, use hdlset_param. For example, to enable adaptive pipelining for a Product block inside a subsystem, my_dut in your Simulink model my_design:

hdlset_param('my_design/my_dut/Product', 'HandleDenormals', 'on')
See also hdlset_param.

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