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Yanjie

MathWorks

Last seen: 1 month ago Active since 2021

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Answered
HDL Verifier Max Bit Width Using System Object
Hi David, Do you mean FIL system object? FIL doesn't support sytem verilog HDL. Can you attach your code and elaborate your wor...

2 months ago | 0

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Answered
Xilinx ZCU111 OFDM example doesn't load
Can you rerun the hardware setup for the support package? Please follow "Hardware Setup" section as mentioned in https://www.m...

8 months ago | 1

Answered
Error in example "5G NR Cell Search Using Xilinx RFSoC Device"
Hi, Do you mean you have successfully finished the last 'load' screen of socBuilder, but saw error when you click the 'Monitor ...

1 year ago | 0