Connecting Systems and the HDL World: Rapid RTL Generation
Deepak Garg, Qualcomm India Pvt. Ltd.
This presentation focuses on how Simulink® enables designers to extend Model-Based Design to describe the functional intent using a higher abstraction level. From this high-level Simulink model, HDL Coder™ generates production-quality RTL code. With this approach, full hierarchical systems comprising both control and data blocks are generated automatically. This eliminates the typical coding bugs introduced by manual flows and significantly reduces development time and effort.
Recorded: 10 Jul 2014
You can also select a web site from the following list
How to Get Best Site Performance
Select the China site (in Chinese or English) for best site performance. Other MathWorks country sites are not optimized for visits from your location.