Use MATLAB and Simulink to develop, deploy, and verify wireless systems designs on AMD® Zynq® UltraScale+™ RFSoC devices.
- Characterize RF performance with data streaming between hardware and MATLAB and Simulink.
- Leverage standards-compliant (5G and LTE) and custom waveforms.
- Model and simulate hardware architectures and algorithms.
- Deploy systems to Zynq UltraScale+ RFSoC boards using automatic HDL code and C code generation.
- Debug and verify algorithms running on hardware connected to MATLAB and Simulink test environments.
Using MATLAB for System Development on Zynq UltraScale+ RFSoC
Verify System RF Performance with Streaming Data
Use MATLAB and Simulink to stream standards-compliant 5G, LTE, and custom waveforms to and from hardware. Measure results in MATLAB to characterize RF performance for systems such as the Avnet® Zynq UltraScale+ RFSoC Development Kit with Qorvo RF Front End and Avnet Wideband mmWave Radio Development Kit for RFSoC Gen-3.
Simulate Wireless Systems for AMD Zynq UltraScale+ RFSoC Devices
Simulate and analyze SoC designs for RFSoC devices. You can partition algorithms between portions to execute on Arm Cortex-53 and IP cores and implement them in programmable logic. You can model the effective communication between processors and programmable logic via AXI4 interconnect as well as communication with off-chip DDR memory. Simulate reference designs with an RFSoC template to analyze the effects of internal and external connectivity on transmit and receive communication algorithms, such as memory behavior and Radio Frequency (RF) input/output (I/O) behavior.
Code Examples and Documentation
Watch Videos
- Hardware/Software Co-Design Workflow | Developing Radio Applications for RFSoC with MATLAB & Simulink, Part 1 (9:12)
- System Specification and Design | Developing Radio Applications for RFSoC with MATLAB & Simulink, Part 2 (9:54)
- Hardware/Software Partitioning | Developing Radio Applications for RFSoC with MATLAB & Simulink, Part 3 (16:16)
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Deploy Models to AMD Zynq UltraScale+ RFSoC Boards
Configure the RF data converters of RFSoC devices directly from MATLAB. Generate HDL code and embedded C code from algorithm models in Simulink, and deploy systems to prototype hardware like the AMD Zynq UltraScale+ RFSoC ZCU111 Evaluation Kit, Zynq UltraScale+ RFSoC ZCU216 Evaluation Kit, and Zynq UltraScale+ RFSoC ZCU208 Evaluation Kit.
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Verify Deployed Algorithms on Zynq UltraScale+ RFSoC Hardware
Rather than writing a Verilog testbench or a VHDL testbench, you can verify your HDL code for implementation on RFSoC devices with MATLAB and Simulink testbenches using HDL cosimulation. Supported simulators include Siemens Questa™, Cadence® Xcelium®, Synopsys® VCS®, and AMD® Vivado™. You can then reuse these MATLAB and Simulink testbenches with RFSoC development boards to verify hardware implementation using FPGA-in-the-loop testing.
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